Enabling Automatic Module Generation for FCCM Compilers

High-performance design flows for FPGAs rely on automatic module generation [1] [2] [3] to quickly create fast and dense circuits. This structured circuit generation becomes even more crucial when FPGAs are used as compute elements in configurable computing machines (FCCM), instead of just implementing glue logic. Many research efforts on automatic compilation to FCCM targets include module generation as a fundamental step [4] [5] [6]. However, no standardized interface currently exists that allows the main flow tools (compiler/synthesis, floorplanning, place and route) access to generator libraries. With the flexibility of today’s generators that are, e.g., able to restructure a circuit exploiting constant inputs [3], the total number of design alternatives covered by a single generator makes the simple static enumeration of all variations (e.g., in a file) infeasible.